Add instruction selection for arithmetic operations
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2 changed files with 60 additions and 0 deletions
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@ -12,12 +12,17 @@ import edu.kit.kastel.vads.compiler.backend.aasm.AasmRegisterAllocator;
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import edu.kit.kastel.vads.compiler.backend.regalloc.Register;
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import edu.kit.kastel.vads.compiler.backend.regalloc.RegisterAllocator;
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import edu.kit.kastel.vads.compiler.ir.IrGraph;
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import edu.kit.kastel.vads.compiler.ir.node.AddNode;
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import edu.kit.kastel.vads.compiler.ir.node.Block;
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import edu.kit.kastel.vads.compiler.ir.node.ConstIntNode;
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import edu.kit.kastel.vads.compiler.ir.node.DivNode;
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import edu.kit.kastel.vads.compiler.ir.node.ModNode;
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import edu.kit.kastel.vads.compiler.ir.node.MulNode;
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import edu.kit.kastel.vads.compiler.ir.node.Node;
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import edu.kit.kastel.vads.compiler.ir.node.ProjNode;
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import edu.kit.kastel.vads.compiler.ir.node.ReturnNode;
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import edu.kit.kastel.vads.compiler.ir.node.StartNode;
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import edu.kit.kastel.vads.compiler.ir.node.SubNode;
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public class X86CodeGenerator implements CodeGenerator {
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@ -63,6 +68,11 @@ public class X86CodeGenerator implements CodeGenerator {
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// TODO: implement code generation
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switch (node) {
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case AddNode add -> addNode(builder, registers, add);
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case SubNode sub -> subNode(builder, registers, sub);
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case MulNode mul -> mulNode(builder, registers, mul);
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case DivNode div -> divNode(builder, registers, div);
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case ModNode mod -> modNode(builder, registers, mod);
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case ConstIntNode c -> constIntNode(builder, registers, c);
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case ReturnNode r -> returnNode(builder, registers, r);
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case Block _, ProjNode _, StartNode _ -> {
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@ -95,4 +105,53 @@ public class X86CodeGenerator implements CodeGenerator {
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.append(registers.get(c));
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}
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private static void addNode(StringBuilder builder, Map<Node, Register> registers, AddNode node) {
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builder.repeat(" ", 2)
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.append("add ")
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.append(registers.get(predecessorSkipProj(node, AddNode.LEFT)))
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.append(",")
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.append(registers.get(predecessorSkipProj(node, AddNode.RIGHT)));
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}
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private static void subNode(StringBuilder builder, Map<Node, Register> registers, SubNode node) {
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builder.repeat(" ", 2)
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.append("sub ")
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.append(registers.get(predecessorSkipProj(node, SubNode.LEFT)))
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.append(",")
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.append(registers.get(predecessorSkipProj(node, SubNode.RIGHT)));
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}
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private static void mulNode(StringBuilder builder, Map<Node, Register> registers, MulNode node) {
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builder.repeat(" ", 2)
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.append("imul ")
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.append(registers.get(predecessorSkipProj(node, MulNode.LEFT)))
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.append(",")
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.append(registers.get(predecessorSkipProj(node, MulNode.RIGHT)));
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}
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private static void divNode(StringBuilder builder, Map<Node, Register> registers, DivNode node) {
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builder.repeat(" ", 2)
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.append("mov ")
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.append(registers.get(predecessorSkipProj(node, DivNode.LEFT)))
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.append(",")
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.append(registers.get(node))
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.append("\n");
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builder.repeat(" ", 2)
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.append("idiv ")
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.append(registers.get(predecessorSkipProj(node, DivNode.RIGHT)));
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}
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private static void modNode(StringBuilder builder, Map<Node, Register> registers, ModNode node) {
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builder.repeat(" ", 2)
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.append("mov ")
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.append(registers.get(predecessorSkipProj(node, ModNode.LEFT)))
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.append(",")
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.append(registers.get(node))
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.append("\n");
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builder.repeat(" ", 2)
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.append("idiv ")
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.append(registers.get(predecessorSkipProj(node, ModNode.RIGHT)));
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}
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}
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@ -13,4 +13,5 @@ _main:
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mov $1,%0
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mov $2,%1
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add %0,%1
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mov %0,%eax
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ret
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