From bbacc928ae5f8041bdd18104784384a42c6484a1 Mon Sep 17 00:00:00 2001
From: Laborratte5 <laborratte5@gmail.com>
Date: Sat, 17 May 2025 17:19:17 +0200
Subject: [PATCH] Add instruction selection for arithmetic operations

---
 .../backend/x86asm/X86CodeGenerator.java      | 59 +++++++++++++++++++
 test/var_add.c0.expected                      |  1 +
 2 files changed, 60 insertions(+)

diff --git a/src/main/java/edu/kit/kastel/vads/compiler/backend/x86asm/X86CodeGenerator.java b/src/main/java/edu/kit/kastel/vads/compiler/backend/x86asm/X86CodeGenerator.java
index de50508..cb627b7 100644
--- a/src/main/java/edu/kit/kastel/vads/compiler/backend/x86asm/X86CodeGenerator.java
+++ b/src/main/java/edu/kit/kastel/vads/compiler/backend/x86asm/X86CodeGenerator.java
@@ -12,12 +12,17 @@ import edu.kit.kastel.vads.compiler.backend.aasm.AasmRegisterAllocator;
 import edu.kit.kastel.vads.compiler.backend.regalloc.Register;
 import edu.kit.kastel.vads.compiler.backend.regalloc.RegisterAllocator;
 import edu.kit.kastel.vads.compiler.ir.IrGraph;
+import edu.kit.kastel.vads.compiler.ir.node.AddNode;
 import edu.kit.kastel.vads.compiler.ir.node.Block;
 import edu.kit.kastel.vads.compiler.ir.node.ConstIntNode;
+import edu.kit.kastel.vads.compiler.ir.node.DivNode;
+import edu.kit.kastel.vads.compiler.ir.node.ModNode;
+import edu.kit.kastel.vads.compiler.ir.node.MulNode;
 import edu.kit.kastel.vads.compiler.ir.node.Node;
 import edu.kit.kastel.vads.compiler.ir.node.ProjNode;
 import edu.kit.kastel.vads.compiler.ir.node.ReturnNode;
 import edu.kit.kastel.vads.compiler.ir.node.StartNode;
+import edu.kit.kastel.vads.compiler.ir.node.SubNode;
 
 
 public class X86CodeGenerator implements CodeGenerator {
@@ -63,6 +68,11 @@ public class X86CodeGenerator implements CodeGenerator {
 
         // TODO: implement code generation
         switch (node) {
+            case AddNode add -> addNode(builder, registers, add);
+            case SubNode sub -> subNode(builder, registers, sub);
+            case MulNode mul -> mulNode(builder, registers, mul);
+            case DivNode div -> divNode(builder, registers, div);
+            case ModNode mod -> modNode(builder, registers, mod);
             case ConstIntNode c -> constIntNode(builder, registers, c);
             case ReturnNode r -> returnNode(builder, registers, r);
             case Block _, ProjNode _, StartNode _ -> {
@@ -95,4 +105,53 @@ public class X86CodeGenerator implements CodeGenerator {
             .append(registers.get(c));
     }
 
+    private static void addNode(StringBuilder builder, Map<Node, Register> registers, AddNode node) {
+        builder.repeat(" ", 2)
+            .append("add ")
+            .append(registers.get(predecessorSkipProj(node, AddNode.LEFT)))
+            .append(",")
+            .append(registers.get(predecessorSkipProj(node, AddNode.RIGHT)));
+    }
+
+    private static void subNode(StringBuilder builder, Map<Node, Register> registers, SubNode node) {
+        builder.repeat(" ", 2)
+            .append("sub ")
+            .append(registers.get(predecessorSkipProj(node, SubNode.LEFT)))
+            .append(",")
+            .append(registers.get(predecessorSkipProj(node, SubNode.RIGHT)));
+    }
+
+    private static void mulNode(StringBuilder builder, Map<Node, Register> registers, MulNode node) {
+        builder.repeat(" ", 2)
+            .append("imul ")
+            .append(registers.get(predecessorSkipProj(node, MulNode.LEFT)))
+            .append(",")
+            .append(registers.get(predecessorSkipProj(node, MulNode.RIGHT)));
+    }
+
+    private static void divNode(StringBuilder builder, Map<Node, Register> registers, DivNode node) {
+        builder.repeat(" ", 2)
+            .append("mov ")
+            .append(registers.get(predecessorSkipProj(node, DivNode.LEFT)))
+            .append(",")
+            .append(registers.get(node))
+            .append("\n");
+
+        builder.repeat(" ", 2)
+            .append("idiv ")
+            .append(registers.get(predecessorSkipProj(node, DivNode.RIGHT)));
+    }
+
+    private static void modNode(StringBuilder builder, Map<Node, Register> registers, ModNode node) {
+        builder.repeat(" ", 2)
+            .append("mov ")
+            .append(registers.get(predecessorSkipProj(node, ModNode.LEFT)))
+            .append(",")
+            .append(registers.get(node))
+            .append("\n");
+
+        builder.repeat(" ", 2)
+            .append("idiv ")
+            .append(registers.get(predecessorSkipProj(node, ModNode.RIGHT)));
+    }
 }
diff --git a/test/var_add.c0.expected b/test/var_add.c0.expected
index 4d57163..42f0659 100644
--- a/test/var_add.c0.expected
+++ b/test/var_add.c0.expected
@@ -13,4 +13,5 @@ _main:
   mov $1,%0
   mov $2,%1
   add %0,%1
+  mov %0,%eax
   ret